ISSN 2380-4505
Vol. 2012, Issue 1, 2012January 01, 2012 EDT
Cost effective 3D Glass Microfabrication for Advanced Packaging Applications
Cost effective 3D Glass Microfabrication for Advanced Packaging Applications
Articles in Vol. 2012, Issue 1, 2012
Vol. 2012, Issue 1, 2012
- Optimizing Product Cost with Supply Chain Cost ModelingChet PaleskoAlan Palesko
- Temporary Bonding and Debonding - An Overview of Today's Materials and MethodsIMAPS symposium Proceedings and Conference Papers
- ULTRA THIN CHIPS STACKING ON TSV SILICON INTERPOSER USING BACK-TO-FACE TECHNOLOGYG. ParèsF. SchneggA. AttardD. CruauF. De CrecyA. N'hariR. AnciantG. KlugH. LuesebrinkK. MartinschitzC. KarouiG. Simon
- NiV Stress Control Utilizing PVD with an Ar / N2 Gas MixtureG. SeryoginS. GolovatoS. SmithK. WilliamsN. LimburnA. WinnG. MundadaG. Adema
- Thermal Stress and Creep Strain Analyses of a 3D IC Integration SiP with Passive Interposer for Network System ApplicationSheng-Tsai WuJohn H. LauHeng-Chieh ChienYu-Lin ChaoRa-Min TainLi LiPeng SuJie XueMark Brillhart
- Solution for HVM TSV Etch ProcessRajiv RoyMatt Wilson
- Use of 3D Packaging Technology for Satellite Active Antennas Front-endsB. BonnetR. ChiniardH. LegayD. NevoP. MonfraixO. VendierP. CoudercJ.-L. Cazaux
- Pushing the 3rd Dimension – Floppy Wafers, Die and Packages? Stress Induced Chip Package Interactions on Thin Mobile DevicesMark NakamotoWei ZhaoRiko Radojcic
- New Build-up Insulation Material Based on Cyclo-Olefin Polymer for High-Performance IC PackagesYohei TateishiMakoto FujimuraTakashi IgaToshihiko Jimbo
- The Application of PEEK to Implantable Electronic Devices Packaging: Water Permeation Calculation Method and Maximum Lifetime with DesiccantNathaniel DahanNick DonaldsonStephen TaylorNuno Sereno
- Control of Package Warpage by Package Substrate Design for Low Profile Package-on-Package StructureTakeshi FurusawaNaomi KawamuraToshiki FurutaniTakashi Kariya
- Precision Jetting of Glob Top Materials – a methodology for process optimizationK.-F. BeckerM. KochJ. BauerT. BraunR. AschenbrennerM. Schneider-RamelowK.-D. Lang
- Simulation and Experiment of Molded Underfill VoidsMyoungSu ChaeEric OuyangJaeHan ChungDokOk YuSeonMo GuGwang KimBilly Ahn
- Enabling the 2.5D IntegrationJohn Y. XieHong ShiYuan LiZhe LiArif RahmanKarthik ChandrasekarDeepa RatakondaManish DeoKaushik ChandaVincent HoolMJ LeeNagesh VodrahalliDale IbbotsonTarun Verma
- Managing Voids in Underfill Process with 5-micron Gap Under Large DieHanzhuang LiangNordson Asymtek
- Through-Silicon-Via (TSV) for silicon package: ″via-bridge″ approachY. LamyS. JoblotC. FerrandonJ.F. CarpentierG. Simon
- Packaging of High Frequency, High Temperature Silicon Carbide (SiC) Multichip Power Module (MCPM) Bi-directional Battery Chargers for Next Generation Hybrid Electric VehiclesZ. ColeB. PassmoreB. WhitakerA. BarkleyT. McNuttA.B. Lostetter
- Multi-functional carbon nanotube composites with super-hydrophobic propertiesSunghoon ParkEunhyoung ChoPaul ThielemannJinseung SohnKunmo ChuSunghee LeeDongouk KimByunghoon Kim
- New Flip-Chip Interconnect Technology for High Performance and High Reliability ApplicationsEiji YamaguchiMutsuo TsujiNozomi ShimoishizakaTakahiro NakanoKatsunori Hirata
- Glass-Insulated Bonding Wire Scales to Support advances in MiniaturizationDominik Stephan
- Pd-coated Cu Wire Bonding Reliability Requirement for Device Design, Process Optimization and TestingInderjit SinghShin LowSyu Fu SongChen Shih JungLin Ming SanIvy QinCuong HuynhHorst ClaubergSon Truong NguyenBob ChylakHui XuViola L. Acoff
- Full Integration and Electrical Characterization of 3D Silicon Interposer Demonstrator Incorporating High Density TSVs and InterconnectsKen MiyairiMasahiro SunoharaJean CharbonnierMyriam AssousJean-Philippe BallyRobert CuchetHelene FeldisKei MurayamaMitsuhiro AizawaGilles SimonMitsutoshi Higashi
- Radiation Mechanisms and Electromagnetic Interference in Ceramic Electronic PackagesJerry AguirreMarcos VargasPaul Garland
- Development of Through Glass Vias (TGV) for 3D-IC IntegrationAric ShoreyScott PollardJohn Keech
- Making New With OldNick Renaud-BezotMark Beesley
- Biocompatible encapsulation and interconnection technology for implantable electronic devicesMaaike Op de BeeckJohn O'CallaghanKaren QianBishoy M. MorcosAleksandar RadisicKarl MalachowskiM. F. AmiraChris Van Hoof
- An Overview - Temporary Wafer Bonding / Debonding for 2.5D and 3D TechnologiesRajen Chanchani
- IC Package Optimization Targeting Multiple Form FactorsJohn Park
- Laminate Materials for Microfluidic PCBsSarkis BabikianBrian SorianoG.P. LiMark Bachman
- Investigation of electrical performance and mechanical reliability of device embedded power moduleMasaya TanakaKeisuke SawadaToru SerizawaShuji Sagara
- Superior Drop Test Performance of BGA Assembly Using SAC105Ti Solder SphereWeiping LiuNing-Cheng LeeSimin BagheriPolina SnugoveskyJason BraggRussell BrushBlake Harper
- Response of Long Sculpted Wire Bonds to Vibrational ExcitationThomas F. MarinisJoseph W. Soucy
- Comparison of Silver vs. Gold Systems in High-Q FTTF LTCC InductorsMatthew J. ClewellWilliam B. Kuhn
- Cost effective 3D Glass Microfabrication for Advanced Packaging ApplicationsJeb H. FlemmingKevin DunnJames GoukerCarrie SchmidtRoger Cook
- Predicting the Reliability of Zero-Level TSVsGreg CaswellCraig Hillman
- Rediscovering Multilayer Rigid-Flex with Z-interconnect TechnologyRabindra N. DasJohn M. LaufferFrank D. EgittoMark D. PoliksVoya R. Markovich
- Meander Delay Compensation in High-Speed Digital Multilayer PackagesRobert FryeKai Liu
- Package-Interposer-Package (PIP): A Breakthrough Package-on-Package (PoP) Technology for 3D-IntegrationRabindra N. DasFrank D. EgittoBarry BonitzErich KoppMark D. PoliksVoya R. Markovich
- Comparison between Single & Multi Beam Laser Grooving of Low-K layersJeroen van BorkuloRene HendriksPeter Dijkstra
- Small Pitch Micro-Bumping and Experimental Investigation for Under Filling 3D StackingAntonio La MannaK. J. RebibisJ. De VosL. BogaertsC. GeretsE. Beyne
- Through Silicon Via (TSV) Technology Creates Electro-Optical InterfacesPhil Marcoux
- Scallop Free Si Etching and Low Cost Integration Technologies for 2.5D Si Interposer.Yasuhiro MorikawaTakahide MurayamaToshiyuki SakuishiToshiyuki NakamuraTakashi KurimotoYuu NakamutaIsao KimuraKoukou Suu
- Advanced Manufacturing Methods for Brazing High-Reliability Electronic PackagesIris Labadie
- Study of Warpage and Mechanical Stress of 2.5D Package Interposers during Chip and Interposer Mount ProcessTakashi HisadaYasuharu YamadaJunko AsaiToyohiro Aoki
- Effects of Extended Dwell Time on Thermal Fatigue Life of Ceramic Chip ResistorsElviz GeorgeMichael OstermanMichael PechtRichard Coyle
- Thin Substrates Bursting into the MarketBernd K AppeltBruce SuDora LeeKidd LeeUno Yen
- Propagation Delay Analysis in 3D Stacked Memory using Novel MOS Depletion Layer Modeling Approach for Through Silicon ViaKaushal KannanSarma G. HariharaSukeshwar Kannan
- A Comparison of 25 Gbps NRZ & PAM-4 Modulation Used in Reference, Legacy, & Premium Backplane ChannelsChad MorganAdam Healey
- Fine Pitch Copper Interconnects for Next Generation Package-on-Package (PoP)Ilyas Mohammed
- Package Reliability Monitored Drop Shock and Temperature Cycling Testing Progression and AdvantagesMichael Ferrara
- Electrical Performance of Through-Silicon Vias (TSVs) for High-Frequency 3D IC Integration ApplicationsJui-Feng HungJohn H. LauPeng-Shu ChenShih-Hsien WuSheng-Che HungShinn-Juh LaiMing-Lin LiShyh-Shyuan SheuZhe-Hui LinChih-Sheng LinWei-Chung LoMing-Jer Kao
- Thin PoP: Warpage Control for Thinner PoP Package in Mobile ApplicationsYuka TamadateSeiji SatoHitomi ImaiKota TakedaTakeshi MeguroTakashi Ozawa
- Reliability Study of Reference Semiconductor Encapsulation Materials for Biocompatible PackagingKarl MalachowskiKaren QianMaaike Op de BeeckRita VerbeeckGeorge BryceHarold DekkersDeniz S. Tezcan
- Accurate Prediction of Thermal Resistance of FET by Detailed Modeling of Heat Generation and Backend StackupQun WanDon WillisDaniel Jin
- Thinner and Miniaturization Embedded Device Package, MCeP, for PoP and Module ApplicationKouichi TanakaNobuyuki KurashimaHajime IizukaKiyoshi OoiYoshihiro MachidaSatoshi ShirakiTetsuya Koyama
- DESIGN AND PROCESS OPTIMIZATION OF THROUGH SILICON VIA INTERPOSER FOR 3D-IC INTEGRATIONPejman MonajemiMichael NewmanCyprian UzohCharles WoychikTerrence Caskey
- Parylene as Thin Flexible 3-D Packaging Enabler for Biomedical ImplantsJimin MaengDohyuk HaWilliam J. ChappellPedro P. Irazoqui
- Obsolescence Management & the Impact on ReliabilityCheryl TulkoffGreg Caswell
- Mixed Attachment Technology Studies in RF & Optoelectronic Packages Requiring High Accuracy PlacementDaniel D. EvansZeger Bok
- Large Size Silicon Interposer and 3D IC Integration for System-in-Packaging (SiP)John LauPei-Jer TzengChau-Jie ZhanChing-Kuan LeeMing-Ji DaiJui-Chin ChenYu-Chen HsinShang-Chun ChenChien-Ying WuLi LiPeng SuJie XueMark Brillhart
- High-Reliability Component Attachment Process for <5μm Placement AccuracyDonald J. BeckZeger BokDaniel Martinez
- Virtual Ground Fence: A Simple Method for Protection against High Frequency Simultaneous Switching NoiseJesse BowmanA. Ege Engin
- Smart and Quick Dk, Df Extraction Flow of Halogen-free and Lead-free Materials under Different TemperaturesChang-Chih LiuCheng-Hua TsaiWei-Ting ChenChang-Sheng ChengLi-Chi Chang
- Quality and Reliability of 3D High-Performance Heterogeneous Integration through Die StackingBahareh BanijamaliLiam MaddenSuresh RamalingamEphrem Wu
- A Numerical Study of Single Phase Dielectric Fluid Immersion Cooling of Multichip ModulesRoy W. KnightSeth FincherSushil H. BhavnaniDaniel K. HarrisR. Wayne Johnson
- Advanced Stepper Through-Silicon Alignment (TSA) Evaluation and Overlay of Distorted Bonded Wafer StacksDoug SheltonC.Y. (Charles) Wang
- Understanding and Controlling Cu Protrusions in 3D TSV ProcessingSeth KrugerKlaus HummlerRobert GeerKathleen DunnColin McDonoughAaron CordesJack EnloeBrian SappIqbal AliStefan PieperSitaram ArkalgudThomas Murray
- A Practical Approach to Analyze Copper Surface Roughness Effects with Applications to Stripline StructuresXichen GuoJi ChenDavid R. JacksonMarina Y. KoledintsevaJames DrewniakChristopher Pan
- Isothermal Aging Effects on the Thermal reliability Performance of Lead-Free Solder JointsJiawei ZhangZhou HaiSivasubramanian ThirugnanasambandamJohn L. EvansM. J. Bozack
- RF/Microwave Die Attach of Gallium Nitride Devices Achieving Less Than 1% Voiding in a Flux-Free EnvironmentPierino I ZappellaPaul W BarnesDavid MuhsBruce Wilson
- A Process For Treating Woven Glass ClothDylan BodayMichael HaagJoe KuczynskiMarkus SchmidtMichael Wahl
- High Frequency Signal Propagation in Through Silicon ViasSrinidhi Raghavan NarasimhanA. Ege Engin
- Heterogeneous Process Development for Electronic Device Packaging with Direct Printed Additive ManufacturingR. X. RodriguezK. ChurchX. Chen
- Mechanical Stress Analysis and Evaluation of Hybrid Land Grid Array Attached Large Form Factor Organic ModulesJohn TorokShawn CanfieldYuet-Ying YuJiantao Zheng
- Influence of Different Packaging and Footprint Technique for Microwave Absorptive Bessel Filter's PerformanceAkhlaq RahmanJim Norman
- Underfill Dispensing for 3D Die Stacking with Through Silicon ViasFuliang LeS. W. Ricky LeeJingshen WuMatthew M. F. Yuen
- Design Optimization of Micro-channel Heat Exchanger embedded in LTCCAparna AravelliSingiresu S. RaoHari K. Adluru
- Stacked Chip Thermal Model Validation using Thermal Test ChipsThomas TarterBernie Siegal
- Thermal Power of Mobile Application ProcessorHeung Kyu KwonJugnwook HwangHyunkwon ChungMunsik KangHyun Duk ChoYoung Min Kim
- Photostabilization of i-line Photoresist and ARC LayerZeliha YILMAZMurat PAKSema İMRAHORILYASAylin ERSOY
- Low Temperature Hybrid Bonding of Organic/Inorganic Substrates at Atmospheric PressureAkitsu Shigetou
- Modeling in the Cloud: Web Hosted CPI Modeling for Fabless Design Houses and OSATs Method for Mechanical Stress Simulation across the Chip & Package Domains in 3D IC'sMark NakamotoKarthikeyan DhandapaniWei ZhaoAhmer SyedWei LinRiko Radojcic
- High Temperature Packaging for SiC Power TransistorsK. BrinkfeldtT. ÅklintC. SandbergP. JohanderD. Andersson
- Manual Assembly of 400um Bumped-Die GaN Power Semiconductor DevicesStephan W. HenningLuke JenkinsSidni HaleChristopher G. WilsonJohn TennantJustin MosesMike PalmerRobert N. Dean
- Gold Ball Wire Bonding with Heated Tool for Automotive MicroelectronicsDavid J Rasmussen
- HIGH RELIABILITY HIGH MELTING LEAD-FREE MIXED BIAGX SOLDER PASTE SYSTEMHongWen ZhangNing-Cheng Lee
- High Yield Embedding of 30μm Thin Chips in a Flexible PCB using a Photopatternable Polyimide based Ultra-Thin Chip Package (UTCP)T. SterkenM. Op de BeeckF. VermeirenT. TorfsL. WangS. PriyabadiniK. DhaenensD. CuypersJ. Vanfleteren
- Development of Synergistic Opto-Electronic Sensing Platform based on Zinc Oxide Semiconducting NanostructuresAnurag GuptaBruce C. KimMitchell SprynEugene EdwardsChristina BrantleyPaul Ruffin
- Glass Wafers as Support Carriers for Wafer Thinning ProcessesAric ShoreyJohn KeechWindsor Thomas
- Electrolytic Deposition of Fine Pitch Sn/Cu Solder Bumps for Flip Chip PackagingStephen KennyKai MatejatSven LamprechtOlivier Mann
- Characterization of Over Pad Metallization (OPM) for High Temperature ReliabilityVarughese MathewTu Anh Tran
- Hardware Design for Multiple Gas Detection System Using Zeolite Coated with Nile RedSon NguyenZ. Joan DelalicDavid M. KargboJoel B. Sheffield
- Electromigration Performance of Fine-Pitch Copper Pillar InterconnectionsAhmer SyedChristopher J. BerryKarthikeyan DhandapaniPatrick ThompsonSeung-Hyun Chae
- Realisation of High Temperature Electronics Packaging Technology for Sensor Conditioning and Processing ApplicationsS T RichesC JohnstonA Lui
- Characterization of silicate sensors on Low Temperature Cofire Ceramic (LTCC) substrates using DSC and XRD techniquesMary RualesKinzy Jones
- Formulation of percolating thermal underfills using hierarchical self-assembly of micro- and nanoparticles by centrifugal forces and capillary bridgingThomas BrunschwilerGerd SchlottigSongbo NiYu LiuJavier V. GoicocheaJonas ZürcherHeiko Wolf
- Electromigration Reliability of Glass Ceramic Multilayer Substrate with Various Surface FinishesHiroshi MatsumotoAkira WakazakiShingo SatoTakashi OkunosonoChihiro Makihara
- Evaluating the Impact of Dwell Time on Solder Interconnect Durability under Bending LoadsSandeep MenonMichael OstermanMichael Pecht
- Assembly and Packaging of a Wireless, Chronically-Implantable Neural Prosthetic DeviceKedar G. ShahA. TookerV. TolosaT. DeLimaW. BenettS. FelixH. ShethS. Pannu
- Material Analysis of Lead Free Solder Deposited by Electrochemical DepositionTom RitzdorfSam LeeIan Drucker
- BGA Solder Life Prediction under Combined Power and Temperature Cycling ConditionFei ChaiMichael OstermanMichael Pecht
- Electrical and Mechanical Performance of Quilt Packaging with Solder Paste by Pin TransferQuanling ZhengM. Ashraf KhanAlfred M. KrimanGary H. Bernstein
- Method to measure wafer stiffness in Fan-Out Wafer Level PackageJorge TeixeiraMário Ribeiro
- Effects of the Impurities on the Embrittlement Phenomena of Electroplated Nickel FilmsYoonchul SohnMinjong BaeInyong SongSangeui LeeDongouk KimKunmo ChuDongun KimSunghoon ParkHajin KimIntaek Han
- Wedge Bonding RF and Microwave DevicesJoe BubelLee Levine
- Embedded Die Substrates for Power ApplicationsBernd K AppeltBruce SuUno YenKay Essig
- Aerosol-Jet Printing for Functionalization of Prototyping Materials for Electronic ApplicationsJohannes HörberChristian GothJörg Franke
- Copper Wire Bonding: R&D to High Volume ManufacturingBob ChylakHorst ClaubergJohn FoleyIvy Qin
- Impact of etch factor on characteristic impedance, crosstalk and board densityAbdelghani RenbiArash RissehRikard QvarnströmJerker Delsing
- Formation of Through-Glass-Via (TGV) by Photo-Chemical Etching with High SelectivityZingway PeiJui-Po SunHsin-Chen LaiPei-Jer TzengCha-Hsin LinTzu-Kun KuMing-Jer Kao
- SYSTEMATIC FEEDBACK LOOP FOR SILICON DIE PICK&PLACE PROCESS IN RECONSTITUTED FAN-OUT EWLB WAFERS IN HIGH VOLUME PRODUCTIONAlberto MartinsNelson PinhoHarald Meixner
- Qualification of Polyimide Based Coverlays for 900 MHz and 2.40 GHz Microstrip Antenna ApplicationsDeepukumar NairGlenn OliverJim Parisi
- Evaluation of Exothermic Reactions in Cofired Platinum /Alumina MicrosystemsAli KarbasiW. Kinzy Jones
- Influence of thermal ageing on void content and shear strength for selected lead free solder die-attachK. C. OtiabaN. RajuR. S. BhattiS. MallikP.K. Bernasko
- A Novel OPC Technique for 2D Critical Dimension Optimization of Sub-micron Patterns using an Experimental MethodologyMurat PakZeliha YilmazAylin Ersoy
- GHz High Frequency TSV for 2.5D IC PackagingChi-Han ChenKuan-Chung LuChang-Ying HungPao-Nan LeeMeng-Jen WangChih-Pin HungHo-Ming TongTzyy-Sheng Horng
- ACES characterization of damping in micro-beam resonatorsJason ParkerXiuping ChenVu NguyenRyszard J. Pryputniewicz
- Demonstration of Inkjet Printed Nanoparticle-based Inks for Solder Bump ReplacementJacob SadieSteven VolkmanVivek Subramanian
- Highly Conducting Carbon Nanotube Composite for Light-Weight Electric Heating Unit ApplicationsKunmo ChuSunghoon ParkSangeui LeeDongouk KimYoonchul SohnDongun KimMinjong BaeHajin KimIntaek Han
- Use of Wire Bonding to Study Bond Pad Damage from Wafer ProbeStevan HunterJonathan L. ClarkDarin HornbergerLance Rubio
- Thin-film High Voltage Capacitors for Hybrid Electric Vehicle Inverter ApplicationsM. Ray FairchildCarl W. BerlinD.H.R. SarmaRalph S. TaylorHan S. LeeSteven E. Staller
- Reliability analysis of low-Ag BGA solder joints using four failure criteriaErin KimuraJianbiao Pan
- Novel ESD Protection Scheme for Testing High Voltage LDMOSSukeshwar KannanBruce KimFriedrich TaenzlerRichard AntleyKen Moushegian
- Packaging of High Power UV-LED Modules on Ceramic and Aluminum SubstratesMarc SchneiderBenjamin LeyrerChristian HerboldStefan Maikowske
- Dicing Development for low-k Copper Wafers using Nickel-Palladium-Gold Bond Pads for Automotive ApplicationTu Anh TranVarughese MathewWen Shi KohK. Y. YowY. K. Au
- A Low Firing Temperature Copper Conductor for use on an Aluminum Metal Compatible Dielectric in LED Thermal Substrate ApplicationsSamson ShahbaziSteve GrabeyRyan Persons
- PoP Package Warpage Contributors' Characterization and Impact AnalysisShengmin Wen
- Optimization of Ag Composition in Cu Pillar Bumps with Sn-xAg SoldersMoon Gi ChoHwan Sik LimSun Hee ParkYong Hwan KwonJaesik ChungJinho ChoiEun-Chul Ahn
- Solder Joint DuctilityRobert DarveauxMichael JohnsonCorey Reichman
- How to Deal with Resonances in WirebondingJosef SedlmairUwe Nacke
- Development of Printed Power Packaging for a High Voltage SiC ModuleHaotao KEDouglas C Hopkins
- Planarization of Deep Structures Using Self-Leveling MaterialsDongshun BaiMichelle FowlerCurtis PlanjeXie Shao
- Novel ultra-compact quad-band System-in-Package (SiP) module with IC embedded in substrate based on SESUB technology.V. SieroshtanG. SevskiyP. KomakhaO. AleksieievA. BuryginO. ChaykaO. RubanM. ShevelovK. KatoA. HoribeH. FujiokaK. RuffingP. HeideM. Vossiek
- Additive Manufacturing of Fine Lines and Embedded Electronics for use in Chip Carriers and Microelectronic SystemsScott LauerWhitten LittlePier BenciTim SchmittJohn Mazurowski
- European R&D Trends in wire bonding technologiesM. Schneider-RamelowJ.-M. GöhreU. GeißlerS. SchmitzK.-D. Lang
- XTRONIC®: Enabler of Improved Performance with Reduced Precious Metal Usage in MicroelectronicsD.M. BaskinB.C. MuñozJ.S. SylvesterJ.P. CahalenA.C. Lund
- Design and Robustness of Quilt Packaging SuperconnectM. Ashraf KhanJason M. KulickAlfred M. KrimanGary H. Bernstein
- Pb-free PBGA Design Points to Improve Handling RobustnessIsabel de SousaBrian RoggemanOswaldo ChaconNiki SpencerMamoru Ueno
- Thermomechanical Design for Fine Pitch 3D-IC PackagesAkihiro HoribeSayuri KoharaKuniaki SueokaKeiji MatsumotoYasumitsu OriiFumiaki Yamada
- The Distribution and Transport of Alpha Activity in TinBrett M. Clark
- A Wafer-level System Integration Technology Incorporates Heterogeneous DevicesHiroshi YamadaYutaka OnozukaAtsuko IidaKazuhiko ItayaHideyuki Funaki
- Thin-Film Signal and Power Redistribution Layers Based on AL-X and CuJohn BaileyAlexander PfeiffenbergerCharles EllisMike PalmerTamara Issac-SmithMichael Hamilton
- Characterization of Interconnects and RF Components on Glass InterposersIvan NdipMichael TöpperKai LöbbickeAbdurrahman ÖzStephan GuttowskiHerbert ReichlKlaus-Dieter Lang
- Measurement-based Signal Quality Test of High-speed TSV ChannelHeegon KimJonghyun ChoDaniel H. JungJonghoon J. KimJoungho KimJun So PakKwang-Seong ChoiHyun-Cheol Bae
- Electromigration Performance of Flip-Chips with Lead-Free Solder Bumps between 30 μm and 60 μm DiameterRainer DohleStefan HärterAndreas WirthJörg GoßlerMarek GorywodaAndreas ReinhardtJörg Franke
- 3D Electromagnetic Modeling of Through Silicon Vias and Interposers in Electronic PackagingDarryl KostkaAntonio Ciccomancini Scogna
- Miniaturization of Electronic Substrates for Medical Device ApplicationsFrank D. EgittoRabindra N. DasGlen E. ThomasSusan Bagen
- Assessment of XRF Technique as a Method to Measure Percent Ag in SnAg Solders for Flip Chip ApplicationsJennifer D SchulerChia-Hsin ShihCharles L ArvinKyungMoon KimEric Perfecto
- Development of High-Dielectric-Strength Ceramic Film Capacitors for Advanced Power ElectronicsBeihai MaManoj NarayananShanshan LiuSheng TongU. (Balu) Balachandran
- A Ceramic Tubular Probe For Online Substance Concentration Measurement, Manufactured By Ceramic Injection MoldingMatthias HartmannBertram Schmidt
- Getters and Design to Reliability: A Tool For Lifetime AssuranceRichard C. KullbergBradley L. Phillip
- Effect of preformed IMC Layer on Electromigration of Solder Capped Cu Pillar Bump Interconnection on an organic substrateYasumitsu OriiKazushige ToriyamaSayuri KoharaHirokazu NomaKeishi OkamotoKeisuke Uenishi
- Highly Flexible Die Attach Adhesives for MEMS packagesTobias Königer
- Process integration solution for damage-free bevel for deep Si etch applicationsBivragh MajeedNina TutunjyanPaolo FioriniDeniz. S. Tezcan
- Challenges in 3D Inspection of Micro Bumps Used in 3D PackagingReza Asgari
- Epidermal electronics for health and fitness monitoringConor RaffertyMitul DalalDan DavisBrian ElolampiYung-Yu HsuStephen LeeLauren KlinkerBriana Morey
- Development of Silver Nanoparticle Ink for Printed ElectronicsYiliang WuPing LiuTony Wigglesworth
- 3D Integration of Wide IO Memory Cube Stacking to 28 nm Logic Chip with High Density TSV through a Fabless Supplier ChainS.Q. GuD.W. KingV. RamachandranB. HendersonU. RayM. Nowak
- Process challenges in 0-level packaging using 100μm-thin chip capping with TSVNga P. PhamVladimir ChermanNina TutunjyanLieve TeugelsDeniz S. TezcanHarrie A.C. Tilmans
- Handling technology for 0.075-square mm powder IC chipHideyuki Noda
- CO2 Technology Transforms ManufacturingDavid Jackson
- Stacking Aspects in the View of Scaling.Joeri De VosAntonio La MannaRobert DailyKenneth June RebibisEric Beyne
- A Novel Packaging Concept for Electronics in Textile UHF AntennasChristian BoehmeRené VierothMervi Hirvonen
- A Novel Wafer-Level Double Side Packaging and Its Microwave PerformanceXiao ChenJiajie TangGaowei XuLe Luo
- Planar Power Inductor with Magnetic Film for Embedded LSI PackageTomoharu FujiiKazutaka KobayashiHiroshi ShimizuShinji NakazawaToshiro SatoFumihiro SatoHiroki Kobayashi
- Thermal Characterization and Simulation of a fcBGA-H deviceEric OuyangWeikun HeYongHyuk JeongMyoungSu ChaeSeonMo GuGwang KimBilly Ahn
Flemming, Jeb H., Kevin Dunn, James Gouker, Carrie Schmidt, and Roger Cook. 2012. “Cost Effective 3D Glass Microfabrication for Advanced Packaging Applications.” IMAPSource Proceedings 2012 (1): 781–84. https://doi.org/10.4071/isom-2012-WP14.