ISSN 2380-4505
Vol. 2013, Issue DPC, 2013January 01, 2013 EDT
Lithography for Wafer Level Packaging for LED Manufacturing
Lithography for Wafer Level Packaging for LED Manufacturing
Michael Hornung,
Articles in Vol. 2013, Issue DPC, 2013
Vol. 2013, Issue DPC, 2013
- Microfluidic Technology using SU8 on top of PCBsStefan GassmannLienhard Pagel
- Integration of Passive Components into 3D PoP Fan-Out PackagesTom Strothmann
- Fabrication of 3D-IC InterposersJohn T. KeechGarret PiechScott Pollard
- 3D Integration of System-in-Package (SiP): Toward SiP-Interposer-SiP for High-End ElectronicsRabindra DasFrank D. EgittoSteven G. RosserErich KoppBarry Bonitz
- Innovative 3D Structures Utilizing Wafer Level Fan-Out (WLFO) TechnologyCurtis ZwengerJinYoung KhimYoonJoo KhimSeWoong ChaSeungJae LeeJinHan Kim
- ChipsetT: Embedded Die Substrate ApplicationsJon G. AdayTed TessierKazuhisa ItoiSatoshi Okude
- Development of Embedded High Power Electronics Modules for Automotive ApplicationsLars BoettcherS. KaraszkiewiczD. ManessisA. Ostmann
- Lead Free Paste with under 3um Solder Particles for Fine Pitch C4 bumping and pre-coating solder applicationsHironori UnoMasayuki IshikawaAkihiro MasudaHiroki MuraokaKanji Kuba
- From Mechanical to Chemical AdhesionMeng HsiehEllina LibmanLutz Brandt
- The Role of Extreme Agitation in Accelerating the Removal Rate of Advanced Packaging PhotoresistsMani Sobhian
- Adopt Advanced RDL Rule to Apply Flip Chip Technology for Next Generation Si Node: Feasibility StudyShengmin WenKyungRok ParkPatrick ThompsonJeongSeok LeeHyunJin Park
- Multi-scale materials data for 3D TSV stack performance simulation and model validationEhrenfried ZschechKong Boon YeapChristoph SanderUwe MühleValeriy Sukharev
- Micro-tube insertion into aluminum pads: Simulation and experimental validationsAlexis BedoinB. Goubault de BrugièreF. MarionF. BergerM. FendlerM. VolpertH. Ribot
- Integration, Electrical Performance and Reliability Investigation of TSVShih-Wei LeeYu-Chen HuCheng-Hao ChiangKuo-Hua ChenChi-Tsung ChiuChing-Te ChuangWei HwangJin-Chern ChiouHo-Ming TongKuan-Neng Chen
- The Reliability Study of a High density Multi Chip Packaging with Folding Flexible SubstrateYin WenBo ZhangYuan LuLiao AnmouDu TianminLixi Wan
- Cost Drivers for 2.5D and 3D ApplicationsChet PaleskoE. Jan VardamanAlan Palesko
- Sealing dispensing requirements to meet MEMS packaging and throughput impactHeakyoung Park
- Electrografted insulator layer as copper diffusion barrier for TSV interposersVincent MevellecDominique SuhrThomas DequivreFrédérique Raynal
- Versatile Z-Axis Interconnection for High Performance ElectronicsRabindra DasJ. M. LaufferF.D. Egitto
- Design, Simulation and Testing of High Density, High Current Micro-machined Embedded CapacitorsAubrey BealC. StevensT. BaginskiM. HamiltonR. Dean
- RF devices: from WLSCP to smart interposersYann LAMYO. El BouayadiC. FerrandonS. JoblotA. JouveL. DussoptT. LacrevazC. BermondB. FléchetG. Simon
- A Solder Joint Reliability Model for the Philips Lumileds LUXEON Rebel LED Carrier Using Physics of Failure MethodologyGreg CaswellRudi HechfellnerMichiel KrugerTewe HeemstraPhilips LumiledsNathan BlattauGregg KittlesenVikrant More
- Development of Plating Process for Micro Bump FormationTakuma KataseKoji TatsumiTekeshi HattaMasayuki IshikawaAkihiro Masuda
- Semiconductor Fluxes for Wafer Bumping in 3D AssemblyMaria DurhamLaura MauerAndy Mackie
- Polymer Based Interposer offering Si Matched CTE + ESD ProtectionKaren Shrier
- Ultra High Density Capacitors merged with Through Silicon Vias to enhance performances.Catherine Bunel
- Stacked 3d package with improved bandwidth and power efficiencyDev Gupta
- A Versatile Optical Head for 3D IC TSV Integration Process ControlG. Fresquet
- Techniques and Tools for Collaborative Thermal and Mechanical Modeling of 3D ICsKamal Karimanal
- Advanced Microelectronics Packaging Solutions for Miniaturized Medical DevicesRabindra DasSteven RosserFrank Egitto
- CoC (Chip on Chip) or FtoF (Face to Face) - PossumTM Technology for 3D MEMS and ASIC eliminating the need of TSV or Wire BondingJemmy SutantoD. H. KangJ. H. YoonK. S. OhMichael OhR. LanzoneR. Huemoeller
- Low Residual Stress and High Performance Dielectric for WLP (Wafer Level Packaging) ApplicationsRaymond ThibaultMichael GallagherKevin WangMatthew YonkeyDuane RomerXiang Qian LiuKim HoGreg ProkopowiczJoe LachowskiMark OliverEric HuengerSeiji InaokaScott KistingLynne MillsSue McNamaraRosemary Bell
- Copper, Nickel, and Lead-Free Solder Electroplating Solutions for Pillar and Micro-Pillar Capping ApplicationsJulia WoertinkErik ReddingtonInho LeeYi QinJonathan PrangePedro Lopez MontesinosJui-Ching LinMasaaki ImanariJianwei DongWataru TachikawaJeff Calvert
- Thermal Analysis of xFD DRAM Packages Through Simulation and Experimental ValidationRon ZhangJohn TsengHala ShabaEllis ChauWael ZohniLaura Mirkarimi
- Advanced Passive Thermal Management for LED Bulb SystemsJames Petroski
- Spheron Fan-In WLCSP Technology Qualification and Scale Up - 200 mm to 300 mmAndre CardosoRui AlmeidaFelandorio FernandesTed TessierAnthony Curtis
- A design tool fully adapted to the development of the thin film packaging process used for MEMS devicesSouchon FredericGervais Anne-CharlotteThouy LaurentSaint-Patrice DamienPornin Jean louis
- Strain in Electroless Copper Films: Analysis by in situ X-Ray Diffraction and Curvature MethodsSimon BambergTobias Bernhard (corresponding author)Laurence J. Gregoriades (presenting author)Frank BrüningRalf BrüningJohannes EtzkornWolfgang FrizMichael MerschkyBruce MuirLaura K. PerryTanu Sharma
- High Reliability Fine Pitch WLCSP for High Pin Count ApplicationsDavid LawheadRonnie YazzieTony CurtisGuy BurgessTed Tessier
- Production of Uniform Dimension Copper Pillars for Flip Chip CSPStephen KennyKai MatejatCarsten SchauerSven Lamprecht
- Temporary and Permanent Adhesives for Thin Wafer Handling and AssemblyMark OliverJong-Uk KimMichael GallagherZidong WangJanet OkadaElissei IagodkineKai ZoschkeMatthias WegnerMichael Töpper
- 3D Packaging- Synthetic Quartz Substrate and Interposer for High Frequency ApplicationsVern StygarTim MobleyShintarou Takahashi
- Glass Carrier Wafers for the Si Thinning Process for Stack IC ApplicationsAric ShoreyBor-Kai WangJoe CanaleWindsor Thomas
- Low temperature MOCVD TiN barrier deposition for high aspect ratio TSVs : A solution for 3D integrationThierry MOURIERStephane MinoretSabrina FadlounLarissa DjomeniSylvain MaitrejeanSteve BurgessAndy PriceChris JonesAnne RouleLaurent Vandroux
- Reliability and Performance Improvements of 3D System-in-Packages in Fan-Out Wafer Level PackagingScott HayesTony GongDoug MitchellMichael VincentJason WrightYap Weng Foong
- Ultra-fine pitch Package on Package solution for high bandwidth mobile applicationsRajesh KatkarZhijun ZhaoRon ZhangRey CoLaura Mirkarimi
- LEDs for SSL - Market Review and ForecastVrinda Bhandarkar
- Lithography for Wafer Level Packaging for LED ManufacturingMichael Hornung
- Novel Low-Loss Photodefined Electrical TSVs for Silicon InterposersParagkumar ThadesarMuhannad S. Bakir
- A New Embedded Package Structure and Technology for the Next Generation of WLP, the Wafer level Fun-Out Package - WFOP (TM)Akio Katsumata
- Groove Geometry and Mold Shrinkage Effects on Die Stress in Flip Chip Molded BGAs (FCMBGA)Bora BalogluMiguel JimarezAhmer Syed
- Thermal modeling approach for enhancing TCNCP process for manufacturing fine pitch copper pillar flip chip packagesSiddharth BhopteJesse GallowayKyung-Rok ParkHyun-Jin ParkJeong-Han ChoiHo-Beob YuSung-Hwan Yang
- An Innovative 2.5D IC Interconnection Reliability SystemAndrew LevyHans ManhaeveEd McBain
- Assembly Standardization for the Diverse Packaging Requirements of MEMS & SensorsRussell Shumway
- 3D Ics with Embedded Microfluidic Cooling and High Aspect Ratio TSV IntegrationParagkumar ThadesarMuhannad S. Bakir
- Electrical Characterization on a High-Speed Wafer-Level PackageKai LiuYongTaek LeeHyunTai KimMaPhooPwint HlaingSusan ParkBilly Ahn
- Semeiconductor Packaging Trends and Materials ChallengesMahadevan “Devan” Iyer
- Thermal & mechanical challenges for 3DIC integrationSeverine Cheramy
- Lithography Process Challenges for 3D and 2.5D ApplicationsDoug SheltonTomii Kume
- Through Si Vias Using Liquid Metal Conductors for Re-workable 3D ElectronicsGeorge A. HernandezDaniel MartinezStephen PatenaudeCharles EllisMichael PalmerMichael Hamilton
- Direct Palladium-Gold on copper as a Surface Finish for next generation Packages.Mustafa OzkokSven LamprechtGustavo RamosArnd Kilian
- Reliability of die to wafer bonding using copper-tin interconnectionsArnaud GarnierRémi FraniatteDavid BouchuRomain AnciantSéverine Chéramy
- Assembly Challenges for 2.5D PackagesMichael G KellyMarnie MatteiRick Reed
- Effect of Substrate Layer Variation on Package WarpageBrendan C. WellsWei LinHyunJin Park
- Robust Reliability Performance of Large size eWLB (Fan-out WLP)Seung Wook Yoon
- A Process Dependent Warpage and Stress Model for 3D Packages Considering Incoming Die/Substrate Warpage and Assembly Process ImpactsWei LinAhmer SyedKiWook LeeKarthikeyan Dhandapani
- The Continued Adoption of ZiBond and DBI in Volume ApplicationsKathy Cook
- Detection and Mitigation of Electrostatic Pull-in Instability in MEMS Parallel Plate ActuatorsColin StevensRobert Dean
Hornung, Michael. 2013. “Lithography for Wafer Level Packaging for LED Manufacturing.” IMAPSource Proceedings 2013 (DPC): 1253–76. https://doi.org/10.4071/2013DPC-wa33.