ISSN 2380-4505
Articles in Vol. 2020, Issue DPC, 2020
Vol. 2020, Issue DPC, 2020
- Trends in FOWLP: 600mm Panel Level for 6-Sided Die Protection with M-SeriesJacinta Aman Lim
- Through Silicon Via Undercut Profile Optimisation for 3D Packaging ApplicationsPaul Gray
- This is Not Your Fathers Advanced Semiconductor Packaging…An EDA PerspectiveJohn Park
- Thin Quad Die Package (QDP) DevelopmentShaun Bowers
- Thermal Management Implications for Heterogeneous Integrated PackagingCameron Nelson
- Samsung Foundry’s 3D Package Solution based on Cadence Design FlowMax MinSungwook Moon
- Reliability Simulation with the Finite Element Analysis (FEA) of Redistribution Layer in Fan-out Wafer Level PackagingYuji Okada
- Polymer Enabled Ultra-Thin Package Solutions for Heterogeneous, Package-in-Package and Embedded ICsDoug Hackler
- Permanent Bonding Adhesive: A Novel Permanent Bonding MaterialTrevor StanleyReihaneh SejoubsariXiao Liu
- Paths Towards Ultra High-Density Interconnect 3D Systems: Contribution of Wafer Geometry for Achieving Sub 200NM Wafer-to-Wafer Bonding OverlaySerena IacovoJoeri DevosAlain PhommahaxayAndy MillerEric BeyneThomas UhrmannAndreas Fehkuhrer
- PCB Embedding of Magnetic Material for Inductor-Based ApplicationsGerald Weis
- PCB Embedding Technology for 5G mmWave ApplicationsStefan KosmiderUwe MaassKavin Senthil MurugesanLars Böttcher
- Multipurpose Use of Laser-Sensitive Materials for Temporary Bonding and Debonding Applications in Wafer-Level PackagingLuke Prenger
- Interconnect Transitions and the Challenges AheadE. Jan Vardaman
- Integration Technologies Transforming the WorldYin ChangRich Rice
- Integrated Packaging Technologies for High-Performance Computing Systems: Challenges and OpportunitiesMax Min
- Improved Optical Profiler Metrology for Advanced PackagingSamuel LeskoRobert Cid
- High Density Integrated Stack Capacitor (ISC) for Advanced Package SolutionsMax MinKevin J. JangSugmin HongJaeYup ChungYoojeong JeongSunwoo ParkJihyung KimJuyong Lee
- Heterogeneous System-in-Package (HSIP) Using Fan-Out Wafer-Level Packaging (FOWLP)Charles WoychikJustin BorskiRobert Nead
- Heterogeneous Integration, Dielets and Chiplets – Why the Hype?Subramanian S. Iyer
- Glass Panel Embedding (GPE) for High-Frequency ApplicationsSiddharth RavichandranAtom WatanabeNobuo OguraMadhavan SwaminathanRao Tummala
- Get MOoRE Out of the PackageWolfgang Sauter
- Fan Out Wafer Level Package With Enhanced Product Reliability and Advanced Node Silicon Chip Package IntegrationGaurav SharmaNishant LakheraCraig BeddingfieldMollie BensonAdnrew J. Mawer
- Embedded Trace and RDL Copper Plating Process for Panel Level Packaging ApplicationsKesheng FengLeslie KimJohnny LeeSaminda DharmarathnaWilliam BowermanJim Watkowski
- Development of Additive Technology for Advanced PackagingJason RouseTakanori InoueTaichi HamadaYusuke FujitaYoshifumi SugisawaMitsuru TanikawaTakashi Watanabe
- Design Rule Study of Compression Molding Process on Polymer Cavity PackagesNao HondaYoshihiro Hakone
- Copper Wire Ready for Automotive AEC Requirements?William Crockett
- Collective D2W Hybrid Bonding for 3D SIC and Heterogeneous IntegrationThomas UhrmannJürgen BurggrafMariana Pires
- Automotive Packaging Trends - Challenges and SolutionsEungSan ChoThorsten Meyer
- Autocatalytic Tin: How to Overcome Process Limitations to Introduce a New Solution for Thick Tin PlatingBritta Schafsteller
- An Embedded Planar-Foil Capacitor Material, FPGA Based Interposer, Aimed at Improving System Performance and Reduce Board Size for Space Based ElectronicsDon HunterGary BolotinMalcolm LiasBen Cheng
- Advanced Packaging Leading Electronics Industry Transition into Next DecadeVaibhav Trivedi
- Adaptive High Density RDL Technologies for Panel Level PackagingLars Böttcher
- Achieving Success in Automotive Leadframe PackagesJohn Nickelsen
- Thin Glass Substrates with Through-Glass ViasAric ShoreyShelby NelsonDavid LevyPaul Ballentine
- The New Technology Solutions for Advanced SiP DevicesYongJai Seo
- Solution for Accelerator Wall of HPC with HBM Integrated PackagesJinWei You
- Prototyping IoT Modules and Assembling by Additive ManufacturingYoko FujitaSteven Watt
- Micro-features in Glass using Laser Induced Deep Etching for Device PackagingJean-Pol DelrueRafael SantosNorbert AmbrosiusRoman OstholtStephan Schmidt
- Memory Chip-to-Chip Integration for High Bandwidth Memory Processor InterfaceAndy HeinigFabian Hopsch
- Leading Edge Glass Interposer for High Frequency ApplicationSatoru KuramochiMasaya Tanaka
- In-process Warpage Prediction and Optimization for Heterogeneously Integrated Packages Using a Novel Thermo-mechanical Modeling SchemePriyal ShahMilind Bhagavat
- Improving WID & WIW Non-Uniformity in ECD ApplicationsCharles SharbonoI -Wen Hsieh
- Glass Interposers Using Cu-plated Through Glass Vias (TGVs)Charles WoychikJustin BorskiRobert Nead
- Fluxless Bonding Via In-Situ Oxide ReductionBob Chylak
- Enhancing the Punch MLF®/QFN Package for Improved Robustness in Automotive ApplicationsMarc A. Mangrum
- Enabling Fine Line RDL and High Aspect Ratios for CU Pillars for Heterogeneous IntegrationFabian BenthausHabib HichriMarkus ArendtMatthew Gingerella
- Die Crack Prevention and Detection in Advanced PackagingWoo Young Han
- Die Backside Metallization for Low Cost High Thermal PackageNokibul Islam
- Cu Interconnect Scaling with Hybrid Bonding for 2.5 and 3D IntegrationThomas WorkmanGuilian GaoGabe GuevaraCyprian UzohGill FountainJeremy TheilDominik SuwitoLaura Mirkarimi
- Coating Adhesion TestingTom Monaghan
- Applications of Novel High-Speed In-line Automatic X-ray Inspection in High-Volume ManufacturingFrank Chen
- An Instrumented Getter for Hermetically Sealed PackagesRobert N. DeanMichael Previti
- Advanced Double Side SiPwith Thermal Enhance Solutions for 5G Mobile ApplicationWen-Jung (Mike) Tsai
- A New Level of Connectivity- 5G Package ConsiderationsMark GerberHarrison ChangWayne LuGavin KaoJonathan ChoRoger Hwang
- 10 micron Pitch Wiring and Bump on Substrate Formed by Imprinting Technology to Apply Low Temperature Flip Chip BondingHiroshi KomatsuNozomi ShimoishizakaToshihiro Yamada
Sharbono, Charles, and I -Wen Hsieh. 2024. “Improving WID & WIW Non-Uniformity in ECD Applications.” IMAPSource Proceedings 2020 (DPC): 341–58. https://doi.org/10.4071/001c.116713.