ISSN 2380-4505
Vol. 2026, Issue DPC, 2026August 19, 2026 EDT
Driving Process Agility and Innovation for Advanced Packaging: Role of Universal Carriers for Singulated Die
Driving Process Agility and Innovation for Advanced Packaging: Role of Universal Carriers for Singulated Die
advanced packagingprocess flexibilityuniversal carriersingulated dieequipment compatibilitytechnology adoptionsustainabilitychipletsheterogeneous integration
Articles in Vol. 2026, Issue DPC, 2026
Vol. 2026, Issue DPC, 2026
- CPO Growth and OpportunityBrandon Hoff
- SiPh CPO – A Paradigm ShiftJean Trewhella
- Power Packaging for AI/ Data Center from Grid to CoreThorsten Meyer
- Overcoming Critical Challenges in GCS for Next-gen. Chiplet and CPO ApplicationsYoshiki Takahashi
- Adhesives Properties Impact on Optical Alignment and PackagingGarian LimAlexander HartwigS. SeethalerT.X. GuoH. WangO. Matyssek
- Ultra-Thick PR Patterning for High Aspect Ratio Fine Pitch Cu Pillars Enabling Advanced LPDDR PackagingOkseon YoonJeongseok MunJinyoung KimIssei SuzukiTatsuya FujiiJeongju ParkJihye Shim
- Predicting the Thermomechanical and Adhesive Properties of a Layered Polyimide Packaging Material Using Molecular SimulationDavid NicholsonAtif AfzalShaun KwakAndrea R. Browning
- Glass-on-Glass: Unlocking Opportunities for PackagingBill TaylorYunjiang DingLei LiJames Hwang
- Nanoporous Silicon Capacitors for Advanced Power Delivery Networks (PDN)Frederic NodetMounir HedirCatherine Bunel
- AI PDN Performance and Efficiency Improvement Enabled by Saras STILE(TM)Bart DeProspo
- Residue Formation Mechanisms in BGA Ball Mounting on OSP-Coated Cu Pads : Influence of Acid Value of Flux, Thermal Impact, Ball Mounting Process Design, and Incoming Pad ConditionChun Wei Yang
- Suppression of Interfacial Delamination in High-Power Devices by Advanced AP CoatingHidenori Higashi
- DiaCool Embedded IMASanchayan Dutta
- Chemical Resistant Dicing Tape for Hybrid Bonding ProcessRyoh TakahashiKoki MarunoKazutoshi FuruzonoNaoki TakaharaSeiji Kai
- Development of Thick High Aspect Ratio Plating Resist TechnologyJenna CorderoLori RattrayDaniel Nawrocki
- B-stageable Conductive Adhesive for Reliable Ceramic Package AssemblyJochen SchuermansMarco DelsartoTamara Bunkens
- Chiplets & Advanced IC PackagingMike Kelly
- Photonic Interconnects & Co-Packaged OpticsPrahalad Parthangal
- Cost Analysis of Panel-level Packaging for HPC and AI ApplicationsAmy Lujan
- Advanced Dielectric Polymer Development at Kayaku Advanced MaterialsAaron A. RachfordJenna CorderoChristopher DiminoQing Min WangLori RattrayCarolyn BakerNicholas SchneiderDaniel J. Nawrocki
- Plasma -Induced Metal Oxide Reduction for Improved Intermetallic Contact Performance in Packaging ApplicationsDaphne PappasTerry DunbarDhia BensalemYaser HamediRyan RobinsonNico CoenenStephanie Schweiger
- Production-Proven Chemical-Free Green Alternative to Solvent and Piranha Wafer Processing using OzonePhillip SundinJohn Ghekiere
- RAM Embedded Die Packaging (EDP) Experts in Heterogeneous Advanced Packaging (AP)Peter Green
- Maskless Additive Fine-Pitch Interconnects and Wire Bond Replacement for Advanced PackagingPatrick HeisslerPatrick Galliker
- Reliability Evaluation for Realizing Panel-Level Packaging for AI/Data Centers and VehiclesKatsuhiro TakaoYuki MatsueYuichi FujimotoTakashi SuzukiYoshiaki Aizawa
- High-Reliability Fine-Pitch RDL on Glass with Superior Electrical Performance for Heterogeneous IntegrationTakamasa Takano
- Revolutionizing Microelectronics: An Innovative Hybrid Evaluation of Pure Argon Plasma in Advancing Wire Bond Performance and Manufacturing EfficiencyJorell Pelingo
- Enabling Advanced Sensor Architectures in Medical, Life Science, and ImagingRichard NoackOliver FoellmerStefan ErnstSteffen LeopoldGuillaume Wong
- Defect-Free Cu-AI Interconnects: Enhancing Automotive Reliability via Dual-Metal PassivationShinoj Sridharan NairDinesh Kumar KumaravelPavan AhluwaliaKhanh Tuyet Anh TranDuwage Anushka Sandaruwan PereraShyam Muralidharan NairOliver Chyan
- Indium Bump Interconnect (IBI) Flip Chip BondingDmitry Padrubny
- Advancing Low-Temperature Hybrid Bonding via Tailored Copper Microstructure EngineeringJobert van EisdenChristian WendelnDirk Tews
- Process Integration of Direct Al-Cu Bonding Toward Heterogeneous Integration of 22nm CMOS FDSOI in Advanced RF PackagingKirthika NahalingamMohammad RezaeiferKamran EntesariLinda Katehi
- Demonstration of <5nm Overlay Distortion for Backside Power Delivery Through Control of Wafer Conditions and ProcessingChristopher NetzbandAndrew TuchmanSheldon MeyersNathan IpIlseok SonAngelique Raley
- Panel-Level Fan-Out QFN for Scalable & Reliable ManufacturingVeronicalyn AbellaBenedict San JoseCliff SandstromAndy Kovats
- Warpage Modeling and Neural Network-Assisted Optimization of Molded Core SubstratesPallavi JithendrriyanGeorgios DogiamisAbhijit DasguptaChristopher Bailey
- Development of TSV Interposer for Control and Readout of Superconducting Quantum Annealing CircuitsN. WatanabeY. AragaA. YamaguchiS. TsukiyamaK. IshiharaT. NishiyamaK. Kikuchi
- High Adhesion Glass Seed Process for Glass Core Packages Using Metal Oxide as Binder LayerKazuhiro HirookaKeita ArikiyoYuka IwamotoSoichiro KanoKyosei KuribayashiMasayuki SakoguchiHonoka NakagawaMayu TsukudaJun-ichi Katayama
- 1um Multi-Layer High Density Build Up (HDBU) SubstratesDouglas Hackler
- Thin-Film Deposition for Large Size Packages on Panel ScaleMarkus Frei
- Enabling Glass-Based AP and CPONils AnspachRoman OstholtDaniel DunkerSascha NehusJannis HeinzNorbert AmbrosiusRuben KahleAndreas Ostmann
- Scalable Density Advancement in Embedded Bridge Interposers through Adaptive Patterning® and Adaptive Pad StacksCliff SandstromBenedict San JoseErick TalainJen-Kuang FangPing-Feng YangSheng-Feng HuangPing-Ching Shen
- Enabling Next Generation Packaging with Glass Core Substrates: Material, TGV and Metallization RequirementsJonas Discher
- High-Resolution Stereolithography-Based Printing of 3D Chip PackagingHylke Akkerman
- 3D-Printed Ceramic Structural Electronics: Integrating Function into FormEric MacDonaldAlexander GomezTenzin LhadenJoshua DantzlerYirong LinTzu-Liang (Bill) Tseng
- Ultrabroadband mmWave/sub-THz Devices for System-on-Package Platforms in the Era of Micro-Additive ManufacturingGenaro Soto ValleFernando PastranaHani Al JamalManos M. Tentzeris
- Inkjet Printing for Advanced PackagingJohannes Menath
- Multi-die Wirebond Development of S32E Automotive Real-Time ProcessorSivasakthya MohanMeijiang SongTu-Anh TranZhanbin SongWei GaoJetse de WitteHuanhuan LiuStephen LeeMun Leit ChaiZahiri Aziz
- Cost-Effective High-Performance Flip Chip MicroLeadFrame®(fcMLF®) PackageKyungSu Kim
- Reducing Wafer-to-Wafer Bonding Misalignment to Enable 140nm Pitch Hybrid BondingAndrew TuchmanChristopher NetzbandJoshua GreklekShinichi TanYuki TaniguchiNathan IpAtsushi NagataIlseok SonAngelique Raley
- Physics Based Analysis of Electromigration Lifetime in Ruthenium and Copper InterconnectsJakob RamosShubhra Bansal
- Advanced Packaging Market Trends in the AI EraGabriela Pereira
- SHIELD USA: Leap-Ahead Organic Substrate Enabled by Fan-Out Technology, Domestic Materials, Process Innovations, and Novel EDA WorkflowsGeorgios DogiamisStanislau NiauzorauGreg JohnsonMatt MagnavitaMike NaujokaitisTim TakeuchiLeslie HwangChris BaileyCraig BishopJason Conrad
- Integrating Thin Film Resistors into Organic Substrates for Module and Integrated Circuit (IC)Packaging-The latest results.John AndresakisOhmega TicerAndreas Schilloff
- Glass Core Substrates for High-Density Chiplet IntegrationLars Böttcher
- Thermo Mechanical Reliability of Through Glass Vias: Modelling, Material Design and Process Co-optimizationPoulomi Mukherjee
- On-Shore Manufacturing of Fan Out Wafer Level Packaging (FOWLP) at 300mm Wafer Size with Fine Redistribution Layers for High-Bandwidth InterconnectsSuresh YeruvaFrank WangDavid Box
- Microstructural Characterization for Bottom Joint of Stacked Micro-via Integrated in a SubstrateK. SuganumaM. NishijimaM.-C. HsiehR. OkumuraH. YoshidaC. ChenA. SuetakeK. YamanakaH. SetoY. KitaharaK. Hashizume
- A Novel Perspective and Methodology on Evaluating the Reliability and Strength of 12-inch Wafer Level Glass CarriersWu-Lung WangYu-Sheng HsiaoWiwy WudjudYi-Hsuan TsaiChin-Li KaoChen-Chao WangLihong CaoChieh LoChih-Pin Hung
- Enabling AI and HPC: Defect-Free, Co-Planar Copper via fill Plating process for Advanced IC SubstratesSam Dharmarathna
- A Copper Interconnect Scaling Roadmap for AI and HPC SystemsSebastiaan MullerRobin DavisBen Wilkinson
- Reengineering Core Packages for Automotive: Materials, Design, and Interconnect EvolutionPrasad Dhond
- Water-proof Barometric Range Pressure Sensor Package Structure and ProcessMarco Del SartoLuca MaggiLuca AimoneAlastair Attard
- Advanced MEMS Packaging based on Parylene: One Material Enabling Encapsulation, Wafer and Chip Bonding, as well as Ultra-thin Flexible Printed Circuit BoardsFranz SelbmannMartin KühnFlorian GlaucheFrank RoscherMaik Wiemer
- Design of MEMS Multiplexer for SiNW-based SensorsBruce Kim
- Driving Process Agility and Innovation for Advanced Packaging: Role of Universal Carriers for Singulated DieJerry BrozVictoria TranRaj Varma
- Innovations in Die Side Capacitor Protection for Enhanced AI and HPC PerformanceChristian Haltenberger
- Reuse and Characterization of Laser Lift-off (LLO) of Bonded Wafers for Advanced PackagingJoshua PeckJungrae ParkJoshua HoogeIlseok Son
Broz, Jerry, Victoria Tran, and Raj Varma. 2026. “Driving Process Agility and Innovation for Advanced Packaging: Role of Universal Carriers for Singulated Die.” IMAPSource Proceedings 2026 (DPC): 1245–74. https://doi.org/10.4071/001c.167772.