Vol. 2018, Issue HiTEC, 2018May 01, 2018 EDT
Analog and Logic High Temperature Integrated Circuits Based on Enhancement Mode Planar SiC JFETs
Analog and Logic High Temperature Integrated Circuits Based on Enhancement Mode Planar SiC JFETs
Peter Alexandrov, Matt O'Grady, Neil Merrett, Laura Walter,
Alexandrov, Peter, Matt O’Grady, Neil Merrett, and Laura Walter. 2018. “Analog and Logic High Temperature Integrated Circuits Based on Enhancement Mode Planar SiC JFETs.” IMAPSource Proceedings 2018 (HiTEC): 79–85. https://doi.org/10.4071/2380-4491-2018-HiTEN-000079.