Vol. 2012, Issue HITEC, 2012January 01, 2012 EDT
Characterization and Reliability of custom digital ASIC designs using a 0.8μm bulk CMOS process for high temperature applications
Characterization and Reliability of custom digital ASIC designs using a 0.8μm bulk CMOS process for high temperature applications
Mark Watts, Shane Rose,
Watts, Mark, and Shane Rose. 2012. “Characterization and Reliability of Custom Digital ASIC Designs Using a 0.8μm Bulk CMOS Process for High Temperature Applications.” IMAPSource Proceedings 2012 (HITEC): 16–23. https://doi.org/10.4071/HITEC-TA13.