Vol. 2015, Issue DPC, 2015January 01, 2015 EDT
Study of chip stack process and electrical property for 3D-LSI
Study of chip stack process and electrical property for 3D-LSI
Akamatsu, Toshiya. 2015. “Study of Chip Stack Process and Electrical Property for 3D-LSI.” IMAPSource Proceedings 2015 (DPC): 530–52. https://doi.org/10.4071/2015DPC-tp15.
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