Vol. 2011, Issue 1, 2011January 01, 2011 EDT
High-quality multiple global layers on chip-redistributed wafer for wafer-level system integration using pseudo-SOC
High-quality multiple global layers on chip-redistributed wafer for wafer-level system integration using pseudo-SOC
IIDA, Atsuko, Yutaka ONOZUKA, Hiroshi YAMADA, Toshihiko NAGANO, and Kazuhiko ITAYA. 2011. “High-Quality Multiple Global Layers on Chip-Redistributed Wafer for Wafer-Level System Integration Using Pseudo-SOC.” IMAPSource Proceedings 2011 (1): 820–27. https://doi.org/10.4071/isom-2011-WP5-Paper3.
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