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ISSN 2380-4505
Symposium Proceedings
Vol. 2011, Issue 1, 2011January 01, 2011 EDT

Molding Flow Modeling and Experimental Study on Void Control for Flip Chip Package Panel Molding with Molded Underfill Technology

Jonathan Tamil, Siew Hoon Ore, Kian Yeow Gan, Yang Yong Bo, Geraldine Ng, Park Teck Wah, Nathapong Suthiwongsunthorn, Surasit Chungpaiboonpatana,
Molding Flow ModelingVoid ControlFlip ChipPanel MoldingMolded UnderfillMUF
https://doi.org/10.4071/isom-2011-WP1-Paper4
IMAPSource Conference Papers
Tamil, Jonathan, Siew Hoon Ore, Kian Yeow Gan, Yang Yong Bo, Geraldine Ng, Park Teck Wah, Nathapong Suthiwongsunthorn, and Surasit Chungpaiboonpatana. 2011. “Molding Flow Modeling and Experimental Study on Void Control for Flip Chip Package Panel Molding with Molded Underfill Technology.” IMAPSource Proceedings 2011 (1): 673–82. https:/​/​doi.org/​10.4071/​isom-2011-WP1-Paper4.

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