Vol. 2014, Issue 1, 2014January 01, 2014 EDT
Cost Effective and High Performance 28nm FPGA with New Disruptive Silicon-Less Interconnect Technology (SLIT)
Cost Effective and High Performance 28nm FPGA with New Disruptive Silicon-Less Interconnect Technology (SLIT)
Kwon, Woon-Seong, Suresh Ramalingam, Xin Wu, Liam Madden, C. Y. Huang, Hung-Hsien Chang, Chi-Hsin Chiu, Steve Chiu, and Stephen Chen. 2014. “Cost Effective and High Performance 28nm FPGA with New Disruptive Silicon-Less Interconnect Technology (SLIT).” IMAPSource Proceedings 2014 (1): 599–605. https://doi.org/10.4071/isom-WP11.