Vol. 2016, Issue S2, 2016October 01, 2016 EDT
Assessment of Optimized Process Quality and Reliability for Wafer Level Applications
Assessment of Optimized Process Quality and Reliability for Wafer Level Applications
Ennis Ogawa, Aimin Xing, David F.-S. Liao, Ten V. Y. Ten, Chong Wei Neo, Feynman W.-C. Chiang, Gaius See, Mabrouk Chaara, George Hung, Endruw Jahja, Steven Nguyen, Michael Hsieh, Ricky W. M. Chen, Darren M.-L. Ho, Susan R. Mulford, Hugh Jorge-Estevez, Melissa Lau, Leah Hilborn, Kashish Shah, Richard Mah, Jeff Mendoza, Bei Zhu, Galen Kirkpatrick, Ying-Ying Hsieh, Paolo Samson, James S. J. Tong, Liming Tsau, J.K. Wang, Vijay Reddy, Frank Hui, Javed Sandhu, Manoj Nair, Keith Tan, Edward Law,
Ogawa, Ennis, Aimin Xing, David F.-S. Liao, Ten V. Y. Ten, Chong Wei Neo, Feynman W.-C. Chiang, Gaius See, et al. 2016. “Assessment of Optimized Process Quality and Reliability for Wafer Level Applications.” IMAPSource Proceedings 2016 (S2): S1–52. https://doi.org/10.4071/isom-2016-slide-6.
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