Vol. 2012, Issue 1, 2012January 01, 2012 EDT
Accurate Prediction of Thermal Resistance of FET by Detailed Modeling of Heat Generation and Backend Stackup
Accurate Prediction of Thermal Resistance of FET by Detailed Modeling of Heat Generation and Backend Stackup
Thermal Resistance FET FEA backend stackup topology i Channel current (mA Lg Gate length (μm) P Heat generation (W mW) pavg Average heat linear density (W/μm) p(x) Heat distribution along channel qavg Average heat area density (W/μm2) q(x) Heat area density along channel (W/μm2) Rth(Tj) Die thermal resistance defined by Tj (°C/W) Rth(Ts) Die thermal resistance defined by Ts as observed in IR measurement (°C/W) tc Channel thickness (nm) Tj Die junction temperature (°C) Tref Reference temperature (°C) Ts Die top surface temperature (°C) Vd Drain voltage (V) Vg Gate voltage (V) Vs Source voltage (V) V(x) Electrical potential along channel x Coordinate along channel with origin at gate center α Backend related linear coefficient used to obtain junction temperature from surface temperate ΔRth Die thermal resistance difference from junction temperature definition to surface temperature definition (°C/W) ΔTjs Temperature difference between junction and top surface (°C/W)
Wan, Qun, Don Willis, and Daniel Jin. 2012. “Accurate Prediction of Thermal Resistance of FET by Detailed Modeling of Heat Generation and Backend Stackup.” IMAPSource Proceedings 2012 (1): 848–56. https://doi.org/10.4071/isom-2012-WP31.